Re: [PATCH 5/6] transport-mmio: Correct spelling errors

[Cornelia Huck <cohuck@redhat.com>]

On Fri, Feb 03 2023, Parav Pandit <parav@nvidia.com> wrote:

> Now that we have individual files, fix reported spelling errors.
>
> While at it, remove extra white space at end of line.
>
> Signed-off-by: Parav Pandit <parav@nvidia.com>
> ---
>  transport-mmio.tex | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/transport-mmio.tex b/transport-mmio.tex
> index 7f2e0c3..7f4cc15 100644
> --- a/transport-mmio.tex
> +++ b/transport-mmio.tex
> @@ -18,7 +18,7 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi
>  
>  MMIO virtio devices provide a set of memory mapped control
>  registers followed by a device-specific configuration space,
> -described in the table~\ref{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Register Layout}.
> +described in the table~\ref{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout}.
>  
>  All register values are organized as Little Endian.
>  
> @@ -32,7 +32,7 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi
>  
>  \begin{longtable}{p{0.2\textwidth}p{0.7\textwidth}}
>    \caption {MMIO Device Register Layout}
> -  \label{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Register Layout} \\
> +  \label{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout} \\
>    \hline
>    \mmioreg{Name}{Function}{Offset from base}{Direction}{Description} 
>    \hline 

More trailing blanks on those two lines (and also several more in the
other register descriptions) -- maybe fix them all in one go?