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Subject: Re: [PATCH v1 1/2] transport-pci: Introduce legacy registers access commands
On Wed, May 03, 2023 at 01:23:55PM -0400, Parav Pandit wrote: > > > On 5/3/2023 12:49 PM, Michael S. Tsirkin wrote: > > On Wed, May 03, 2023 at 10:49:14AM -0400, Parav Pandit wrote: > > > > > > > > > On 5/3/2023 1:50 AM, Michael S. Tsirkin wrote: > > > > On Wed, May 03, 2023 at 06:26:58AM +0300, Parav Pandit wrote: > > > > > > > > +Legacy registers write admin command follows \field{struct virtio_admin_cmd}. > > > > > +This command writes legacy registers of a member VF device. Driver should write > > > > > +appropriate register \field{size} depending on the width of the legacy > > > > > +common registers or device specific registers. > > > > > +Driver sets command \field{opcode} to VIRTIO_ADMIN_CMD_LREG_WRITE. > > > > > +Driver sets \field{group_type} to 1 for VFs. > > > > > +Driver sets \field{group_member_id} to a valid VF number. > > > > > + > > > > > +The \field{command_specific_data} has following listed structure format: > > > > > + > > > > > +\begin{lstlisting} > > > > > +struct virtio_admin_cmd_lreg_wr_data { > > > > > + u8 offset; /* Starting byte offset of the register(s) to write */ > > > > > + u8 size; /* Number of bytes to write into the register. */ > > > > > + u8 register[]; > > > > > > > > And maybe add > > > > u8 reserved[]; /* structure padding to multiple of 8 bytes */ > > > > > > > > > +}; > > > Thinking, what do we miss without the padding here? > > > > it's not 100% clear where the padding is. > > > It is same as rest of the other virtio structures as described in "Structure > Specifications" section. > > "Many device and driver in-memory structure layouts are documented using the > C struct syntax. All structures > are assumed to be without additional padding." exactly, so please include the padding explicitly.
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