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Subject: Groups - Freescale NMG DUART registers (FSL_NMG_DUART.zip) uploaded
I have uploaded a zip file containing some registers that we (members of the documentation team for the Freescale Networking and Multimedia Group) used to check out the SIDSC register specialization. In some cases, text fields have been shortened for convenience, but the registers - there are just over a dozen of them - are pretty much complete. The DUART block, which appears in numerous Freescale NMG documents, such as the MPC8548E PowerQUICC III Integrated Processor Reference Manual, Rev 2, contains a virtual cloned set of the standard (National Semiconductor) 16550 UART registers. This block was chosen in the hope that these registers might be recognizable and even useful to others. The block is relatively simple and contains enough registers to be useful but none that are truly exotic in design. Here are some notes on the registers as we entered them: Our registers are numbered with bit 0 as the most-significant bit. National Semiconductor and most other organizations use the other ordering. For the immediate present, only one set of registers was entered. There is an identical set at a different offset. We have not entered reserved fields. Note that I have coded in the location of the DTD. Also included in the zip file are two of the SIDSC DTD files I had to modify slightly in order to get the registers to work as I thought the spreadsheet intended. Here are these changes: In file sidsc-component.dtd, in section TOPIC NESTING OVERRIDE (starting on line 76), I added a * character in four places where the normalization spreadsheet clearly intended multiple instances of items memoryMap, addressBlock, register and bitField. I am confident in the necessity for these changes, since this issue has already been reported on the SIDSC wiki (see http://wiki.oasis-open.org/dita/Semiconductor/RegisterSpecialization/RegisterBugs.) as item 7, "referenced infotypes allowed exactly once". In file sidsc-bitField.mod, I made the following changes (with line numbers of the original): - commented out lines 41-43 - inserted line containing text "(%bitFieldResetValue;)," immediately following line 147 - inserted the following lines immediately after line 180 <!-- LONG NAME: bitFieldResetValue --> <!ELEMENT bitFieldResetValue (#PCDATA) > <!ATTLIST bitFieldResetValue %univ-atts; specentry CDATA "bitField Reset Value" > I make no claim for the correctness of the changes to sidsc-bitField.mod; however, without some such changes the xml file would not allow us to add the register bitfield's reset value. -- Tom Cihak The document named Freescale NMG DUART registers (FSL_NMG_DUART.zip) has been submitted by Tom Cihak to the DITA Semiconductor Information Design SC document repository. Document Description: DUART register test set View Document Details: http://www.oasis-open.org/apps/org/workgroup/dita-sidsc/document.php?document_id=27872 Download Document: http://www.oasis-open.org/apps/org/workgroup/dita-sidsc/download.php/27872/FSL_NMG_DUART.zip PLEASE NOTE: If the above links do not work for you, your email application may be breaking the link into two pieces. You may be able to copy and paste the entire link address into the address field of your web browser. -OASIS Open Administration
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