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Subject: RE: virtq configuration over PCI


Hi Lior


With regards to your points on HW implementation, I'm not sure I understand your concerns.

Guest performing queue write:
1. Single write PCIe transaction with queue_select and other fields (e.g. desc_addr, avail_addr) set
	1.1. HW should be able to process transaction before next one (most likely pipelined writes)
		- however if it can't, it would just backpressure the PCIe hard IP in the HW

Guest performing queue read:
1. Single write PCIe transaction with queue_select set
	1.1. HW would just store queue_select value
2. Single read PCIe transaction
	2.1 HW would return queue information for queue selected in earlier PCIe write transaction.

HW would have a separate queue_select register per VF (Virtual Function), so any accesses from other guests inbetween 1 and 2 above would not cause any problems.

Within a guest, would a guest set up a queue_select and then before generating the read transaction for that queue, change the queue_select? (seems unlikely)

Regards
Kully
-----Original Message-----
From: virtio-dev@lists.oasis-open.org [mailto:virtio-dev@lists.oasis-open.org] On Behalf Of Lior Narkis
Sent: Tuesday, July 18, 2017 3:29 PM
To: virtio-dev@lists.oasis-open.org
Subject: [virtio-dev] virtq configuration over PCI

Hi All,
I am trying to figure out how the queue_select mechanism works.
It seems that there is an assumption that the device can react to the pcie write of the queue index to queue_select, before other pcie transactions that come after are being served.
So for example, reading the queue_size after writing to queue_select.

I would like to understand if I captured it right, and if so, understand how it is guaranteed today with a SW implementation of a device.

Having an HW implementation in mind, I believe this mechanism limits some possible implementations, and it is not robust for adding/changing new queue properties, which will require a new field on the PCIe BAR.

I believe a cleaner way will be to have a queue for device management.
The parameters of how to access this queue should be R/W on the PCIe BAR, but there is only one such queue so no need for the select.
In this queue the work is a command to the device. e.g create_virtq

Kind Regards,
Lior Narkis



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