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Subject: Re: [PATCH v3 2/3] shared memory: Define PCI capability
On Thu, Mar 07, 2019 at 06:24:57PM +0000, Dr. David Alan Gilbert wrote: > * Stefan Hajnoczi (stefanha@redhat.com) wrote: > > On Mon, Mar 04, 2019 at 01:25:30PM +0000, Dr. David Alan Gilbert (git) wrote: > > > +\begin{lstlisting} > > > +struct virtio_pci_shm_cap { > > > + struct virtio_pci_cap cap; > > > + u32 offset_hi; > > > + u32 length_hi; > > > + u8 id; > > > +}; > > > +\end{lstlisting} > > > > Are there any alignment requirements for PCI capability structures? > > The PCI spec says 'Each capability must be DWORD aligned. ' > > > This struct ends with a u8, which might be a problem if 32-bit or 64-bit > > alignemnt is required by something. > > It doesn't seem to be unusual, for example the MSI capability structure > seems to be 10 or 14 bytes even with the DWORD alignement restriction > for the start of it. Sounds good. Just wanted to check. Stefan
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