[PATCH 2/3] pci: fix config notify bit.

[Rusty Russell <rusty@au1.ibm.com>]

The Linux code uses 0x2, so I assume second lowest bit is right...

Signed-off-by: Rusty Russell <rusty@au.ibm.com>
---
 virtio-v1.0-wd01-part1-specification.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/virtio-v1.0-wd01-part1-specification.txt b/virtio-v1.0-wd01-part1-specification.txt
index 3ca180f..52adf24 100644
--- a/virtio-v1.0-wd01-part1-specification.txt
+++ b/virtio-v1.0-wd01-part1-specification.txt
@@ -1375,7 +1375,7 @@ state, as reflected in the virtio header in the PCI configuration
 space. In this case:
 
 1. If MSI-X capability is disabled: an interrupt is delivered and
-  the second highest bit is set in the ISR Status field to
+  the second lowest bit is set in the ISR Status field to
   indicate that the driver should re-examine the configuration
   space.  Note that a single interrupt can indicate both that one
   or more virtqueue has been used and that the configuration
-- 
1.8.3.2