RE: [PATCH v2 0/2] transport-pci: Introduce legacy registers access using AQ

[Parav Pandit <parav@nvidia.com>]

> From: Michael S. Tsirkin <mst@redhat.com>
> Sent: Tuesday, May 23, 2023 2:17 PM
> 
> On Mon, May 15, 2023 at 02:30:55PM +0000, Parav Pandit wrote:
> >
> > > From: Michael S. Tsirkin <mst@redhat.com>
> > > Sent: Monday, May 15, 2023 6:09 AM
> > > To be more specific, device config often has the same layout under
> > > legacy and modern. Thus if getting an offset within device config,
> > > same decoding logic should be reusable between legacy and modern.
> > Modern device registers are directly accessible from the guest driver without
> mediation for VF,SF,SIOV.
> > Hence, there is no need to have commands for modern register access over
> some VQ.
> 
> Yes, there's need, and some of it you were pushing yourself.
Yes, there is need without mediation of AQ.
It was discussed in depth cfgq idea with trade off.

> AQ will allow reduced memory with SRIOV, and support for SIOV.
Already discussed, v0 and v1, mediation via AQ is not the way for SRIOV.
SIOV starting with single goal of only backward compatilbity hence, AQ is also doesn't look future forward.

And your summary email, we parked it aside for now.