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<p><em>Subject</em>: <b>RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</b></p>

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<ul>
<li><em>From</em>: <b>Parav Pandit &lt;pa&#x72;a&#118;&#x40;nv&#x69;&#x64;ia&#46;&#99;o&#109;&gt;</b></li>
<li><em>To</em>: Jason Wang &lt;&#106;a&#x73;ow&#97;ng&#64;r&#101;d&#x68;a&#x74;.&#x63;&#111;m&gt;</li>
<li><em>Date</em>: Fri, 9 Jun 2023 03:25:57 +0000</li>
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<pre>
&gt; From: Jason Wang &lt;&#106;a&#115;o&#119;a&#110;&#x67;&#x40;redha&#x74;.co&#x6d;&gt;
&gt; Sent: Thursday, June 8, 2023 11:03 PM

&gt; When legacy drivers are doing feature negotiation, the hypervisor must trap and
&gt; negotiate those two features.
Device reset to be trapped as well towards 1.x.

And this messes the 1.x flow with FEATURES_OK.
More citations from the spec:

&quot;Legacy driver implementations often used the device before setting the DRIVER_OK bit, and sometimes
even before writing the feature bits to the device.&quot;

It may even set before setting the feature bits.
It is ugly to use the 1.x state machine.
I would like to keep the stateful interactions of 1.x device outside of 0.9.5.

&gt; When modern drivers are doing the feature negotiation, the hypervisor is not
&gt; involved at all. So modern drivers can choose to negotiate (e.g try to mediate
&gt; legacy for L2) or not.

</pre>
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<ul><li><strong>Follow-Ups</strong>:
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<li><strong><a name="00224" href="msg00224.html">Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Jason Wang &lt;&#x6a;&#97;&#115;ow&#x61;&#x6e;g&#x40;red&#104;at.&#99;om&gt;</li></ul></li>
</ul></li></ul>
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<ul><li><strong>References</strong>:
<ul>
<li><strong><a name="00052" href="msg00052.html">Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> &quot;Michael S. Tsirkin&quot; &lt;&#x6d;st&#x40;r&#101;d&#104;a&#116;&#46;com&gt;</li></ul></li>
<li><strong><a name="00054" href="msg00054.html">RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#112;&#x61;&#x72;av&#64;&#x6e;&#x76;i&#x64;&#x69;a&#46;com&gt;</li></ul></li>
<li><strong><a name="00055" href="msg00055.html">Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> &quot;Michael S. Tsirkin&quot; &lt;&#109;st&#x40;&#114;&#101;dhat.&#x63;&#x6f;m&gt;</li></ul></li>
<li><strong><a name="00057" href="msg00057.html">RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#x70;&#x61;r&#97;&#x76;&#x40;n&#118;i&#100;ia.&#x63;o&#109;&gt;</li></ul></li>
<li><strong><a name="00064" href="msg00064.html">Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> &quot;Michael S. Tsirkin&quot; &lt;&#x6d;s&#116;&#x40;re&#x64;hat&#46;com&gt;</li></ul></li>
<li><strong><a name="00074" href="msg00074.html">RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#112;&#97;rav&#x40;&#110;&#x76;i&#x64;ia.&#99;om&gt;</li></ul></li>
<li><strong><a name="00075" href="msg00075.html">Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> &quot;Michael S. Tsirkin&quot; &lt;m&#115;&#116;&#64;r&#x65;&#x64;&#104;at.&#x63;om&gt;</li></ul></li>
<li><strong><a name="00076" href="msg00076.html">RE: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#112;a&#114;av&#64;&#x6e;&#118;&#x69;d&#x69;a&#46;co&#109;&gt;</li></ul></li>
<li><strong><a name="00084" href="msg00084.html">Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> &quot;Michael S. Tsirkin&quot; &lt;&#x6d;&#115;&#116;&#64;&#x72;e&#x64;h&#x61;&#x74;&#x2e;&#99;om&gt;</li></ul></li>
<li><strong><a name="00085" href="msg00085.html">RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;p&#97;r&#97;v&#x40;&#110;&#118;&#x69;&#100;ia.&#x63;om&gt;</li></ul></li>
<li><strong><a name="00091" href="msg00091.html">Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> &quot;Michael S. Tsirkin&quot; &lt;&#x6d;st&#64;r&#101;&#100;&#104;&#x61;t.c&#111;&#109;&gt;</li></ul></li>
<li><strong><a name="00135" href="msg00135.html">Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Jason Wang &lt;&#106;&#x61;&#x73;owa&#110;&#x67;&#x40;&#x72;edh&#x61;t&#x2e;&#99;om&gt;</li></ul></li>
<li><strong><a name="00139" href="msg00139.html">RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#x70;&#97;&#114;&#x61;&#x76;&#64;n&#x76;i&#100;&#x69;&#x61;&#x2e;com&gt;</li></ul></li>
<li><strong><a name="00144" href="msg00144.html">Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Jason Wang &lt;j&#x61;s&#111;&#119;&#x61;&#x6e;&#103;&#x40;&#x72;&#x65;dh&#x61;t&#x2e;&#x63;&#111;&#109;&gt;</li></ul></li>
<li><strong><a name="00180" href="msg00180.html">RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#x70;&#x61;r&#x61;v&#x40;&#110;vi&#x64;&#105;&#x61;&#x2e;co&#x6d;&gt;</li></ul></li>
<li><strong><a name="00214" href="msg00214.html">Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Jason Wang &lt;jaso&#x77;a&#x6e;&#103;&#64;&#114;&#x65;dh&#97;t.&#99;&#111;&#x6d;&gt;</li></ul></li>
<li><strong><a name="00215" href="msg00215.html">RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#112;&#x61;&#114;&#x61;&#x76;&#64;nvi&#x64;&#105;&#97;&#x2e;com&gt;</li></ul></li>
<li><strong><a name="00216" href="msg00216.html">Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Jason Wang &lt;&#106;&#x61;s&#111;&#x77;a&#x6e;g&#64;r&#x65;&#x64;&#x68;&#x61;&#116;.&#99;om&gt;</li></ul></li>
<li><strong><a name="00217" href="msg00217.html">RE: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#112;&#x61;&#x72;&#x61;&#118;&#x40;nvi&#x64;&#x69;&#x61;&#46;co&#x6d;&gt;</li></ul></li>
<li><strong><a name="00218" href="msg00218.html">Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Jason Wang &lt;&#x6a;&#x61;&#x73;&#x6f;&#x77;a&#x6e;g&#64;re&#100;ha&#x74;.&#x63;om&gt;</li></ul></li>
<li><strong><a name="00219" href="msg00219.html">RE: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Parav Pandit &lt;&#112;&#x61;&#x72;&#x61;v&#64;nvi&#x64;&#105;a.co&#x6d;&gt;</li></ul></li>
<li><strong><a name="00220" href="msg00220.html">Re: [virtio-comment] Re: [virtio-dev] Re: [PATCH v3 0/3] transport-pci: Introduce legacy registers access using AQ</a></strong>
<ul><li><em>From:</em> Jason Wang &lt;&#106;as&#x6f;wang&#64;re&#100;&#x68;&#x61;t&#x2e;com&gt;</li></ul></li>
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