[PATCH v3 0/9] virtio-iommu: Support page tables

[Jean-Philippe Brucker <jean-philippe@linaro.org>]

Add page table support for Arm SMMUv3, Intel VT-d, RISC-V IOMMU and AMD
IOMMU to the virtio-iommu specification. The main advantage of page tables
over the MAP/UNMAP interface is sharing virtual address spaces (SVA aka
SVM), where an endpoint with PASID and I/O page fault support can directly
access process address spaces, and applications don't have to explicitly
deal with DMA buffers. Using page tables for regular DMA is also faster
than MAP/UNMAP because it removes the context switch on MAP (while UNMAP
is replaced by INVALIDATE), but requires pinning all guest memory which
prevents the host from over-committing resources. Some endpoints support
I/O page faults (PCIe PRI) which removes the need for pinning guest
memory, but also has a runtime cost.

One virtio-iommu instance can provide both interfaces: page tables for
endpoints that support unpinned memory, and MAP/UNMAP for the others. 

Find more details and rationale on the previous posting [1]. Since v2,
I've updated the VT-d support following Tina's review (see changelog on
individual patches), and some small fixes.

You can find a PDF with these changes and diff colors here:

https://jpbrucker.net/virtio-iommu/spec/virtio-iommu-pt-v1.7-diff.pdf
https://jpbrucker.net/virtio-iommu/spec/virtio-iommu-pt-v1.7.pdf
https://jpbrucker.net/git/virtio/log/?h=viommu/tables

[1] https://lists.oasis-open.org/archives/virtio-comment/202310/msg00018.html

Jean-Philippe Brucker (8):
  virtio-iommu: Add ATTACH_TABLE request
  virtio-iommu: Add INVALIDATE request
  virtio-iommu: Add Arm SMMUv3 support
  virtio-iommu: Add PASID field to DETACH
  virtio-iommu: Add RISC-V page tables
  virtio-iommu: Add AMD page tables
  virtio-iommu: Add VIRTIO_IOMMU_RESV_MEM_T_IDENTITY
  virtio-iommu: Add PASID information to fault report

Tina Zhang (1):
  virtio-iommu: Add VT-d IO page table

 device-types/iommu/description.tex        | 357 ++++++++++++++++++++--
 device-types/iommu/device-conformance.tex |   3 +
 device-types/iommu/driver-conformance.tex |   3 +
 device-types/iommu/pgtable-amd.tex        | 171 +++++++++++
 device-types/iommu/pgtable-arm.tex        |  78 +++++
 device-types/iommu/pgtable-intel.tex      | 118 +++++++
 device-types/iommu/pgtable-riscv.tex      |  92 ++++++
 introduction.tex                          |   9 +
 8 files changed, 804 insertions(+), 27 deletions(-)
 create mode 100644 device-types/iommu/pgtable-amd.tex
 create mode 100644 device-types/iommu/pgtable-arm.tex
 create mode 100644 device-types/iommu/pgtable-intel.tex
 create mode 100644 device-types/iommu/pgtable-riscv.tex

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2.43.0